RK35xy CSI DPHY split mode

The RK35xy MIPI CSI-2 DPHYs have an additional clock lane and can split the data lanes. This allows for two logical PHYs that interface two different image sensors for example (with max. two lanes per sensor, of course).

• Implement split mode
• Convert GRF access to @fratti 's new HIWORD macros
• Activate PHY driver in default config.
• RK3568: introduce new MUX V4L2 subdevice that addresses the dynamic routing
• RK3568: Update documentation w.r.t. MIPI capture (including MUX subdev)
• DT nodes for MIPI CSI-2 Receiver in RK3568 (needs split dphy feature with updated DT integration)
• DT overlay for Radxa Camera 8M (needs split dphy feature with updated DT integration)
• DT nodes for MIPI CSI-2 Receiver (at least index 2-5) in RK3588